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Soitec claims circuit stacking is ready for prime time

By Peter Clarke
EE Times Europe
March 26, 2009 (06:45 AM EST)
 


LONDON — Silicon-on-insulator (SOI) wafer and substrates supplier Soitec SA (Bernin, France) has said its circuit stacking technology is ready for technology transfer and manufacturing.

So-called Smart Stacking, was developed originally at Tracit Technologies SA, which Soitec acquired in July 2006. Tracit (Grenoble, France) was itself a spin-off from CEA-Leti.

Smart Stacking is a low-temperature industrial process that achieves wafer-level circuit stacking onto a range of starting materials. Smart Stacking can be used for the production of high pixel-count image sensors; and it will also enable a range of other photonics applications, RF circuits, and the realization of more complex 3D product architectures, Soitec claimed.

Smart Stacking allows the transfer of thin layers of processed wafers onto a variety of materials. It used low-temperature, high-energy wafer bonding, and thinning techniques and Soitec said that several wafer types coming from a number of foundries and IDMs have been successfully processed for prototyping and production in its manufacturing line.

"For lower volume applications, we can provide circuit stacking custom manufacturing services, but we recognize that higher volume applications may be served best by transferring a customized process to our customers, giving them opportunities to simplify their logistics, reduce costs and shorten cycle times," said Bernard Aspar, vice-president of the Tracit business unit within Soitec, in a statement. "Therefore we provide both manufacturing service and technology licensing options."

According to a recent study on 3-D ICs by Yole Development, an independent semiconductor market research and analysis firm, the demand for wafer-level transfer processing is forecasted to reach significant volume production by 2010 or 2011, mainly driven by image sensor applications. "By 2012, when the market for 3-D integration of heterogeneous components such as memories, logic, power ICs and analog takes off, Soitec's circuit stacking technology will enable further device design simplification and manufacturing with hybrid function capability and technology integration," said Eric Mounier, co-founder of Yole Development, in the same statement.

Related articles:

Yole predicts millions of 3D-TSV wafers by 2015

Soitec lowers full-year guidance

Soitec inaugurates Singapore fab


 
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