Triple-loop synthesizer: low phase noise
Single-loop phase-locked loop (PLL) designs are economical and efficient and, when used with fractional-N technology, can provide moderate performance, fine frequency resolution and good frequency agility. The MXG signal generators implement a new triple-loop design and “frequency plan” that results in substantial phase noise improvements close to the carrier and at wide offsets (Figure 1). Three different levels of phase noise performance are available, including two options that improve on the standard phase noise performance. The MXG delivers unmatched phase noise at -146 dBc at 1 GHz and 20 kHz offset and -96 dBc spurs at 1 GHz. Figure 1 shows the “standard” and “best” levels of performance.
In the MXG, the key to improved phase noise is the frequency plan, which is optimized for the triple-loop topology. The frequency plan addresses several attributes: the choice of oscillator and reference frequencies in the synthesizer sum and offset loops, and the associated frequency conversion (mixers and multipliers) and filtering.
The triple-loop approach optimizes frequency choices for effective filtering of undesirable signals pushing them outside the bandwidth of the synthesizer circuits. In the MXG, the plan arranges the frequency references and conversions such that the undesirable mixing products are placed far from the desired frequencies and modest filtering can heavily attenuate them. This approach also allows internal signal levels to be set higher, resulting in relatively lower broadband noise and improved dynamic range.
For less-demanding applications, the X-Series signal generators include a range of alternatives to match cost and performance requirements. For example, the single-loop EXG models provide a moderate performance choice at a lower cost.
Vector channel corrections: low distortion and high modulation accuracy
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