An efficient and safe approach of radar signal capturing and processing : Page 6 of 7

June 04, 2015 // By Peter Aberl, Texas Instruments
On the way to autonomous driving advanced driver assistance systems (ADAS) based on vision, LIDAR and radar have to gradually supersede the driver’s visual sense. To achieve this challenging goal ADAS sensors have to further evolve to become more reliable, more accurate, safer and more efficient. This article focuses on automotive radar and specifically discusses signal processing steps of a modern fast chirp radar system. An example shows how radar signal capturing and processing can be realized in an efficient and safe way. Additional automotive radar aspects like low power, small form factor and scalability are also touched.
A sampling rate of 25 MHz supports faster chirps with enhanced range and velocity resolution. A 12-bit parallel digital output with a clock signal and two programmable sync signals enables a seamless connection with one of the video input ports of the SoC. Parity information can be optionally presented at a 13th data line, which facilitates end-to-end protection from the internal ADC output to the memory of the TDA3x. The digital data of the four channels is streamed out in an interleaved manner, i.e. every fourth sample belongs to the same channel. A built-in pattern generator can produce pre-defined test pattern like ramp, toggle pattern or a custom pattern. This feature can be used to verify during start-up or occasionally during normal operation the physical link between ADC and SoC.

The above mentioned programmable ADC features can be configured by the SoC via a serial peripheral interface (SPI). The ADC-frontend is available in a compact 9-mm by 9-mm QFN package.

As the name indicates the TDA3x is a 3rd generation SoC family developed for Driver Assistance applications. The family is designed from ground up with functional safety and ISO 26262 in mind and is available in different configurations and speed grades. The TDA3xR members of TDA3x family are most suited for Radar applications, as the ‘R’ indicates. The designator ‘x’ is a placeholder for various speed grades allowing a scalable implementation of radar sensors. The TDA3x family comprises a heterogeneous combination of processing elements optimized for the different software tasks. A dual Cortex-M4 sub-system, an Embedded Vision/Vector Engine (EVE) sub-system and up to two C66x floating point DSP sub-systems allow a power efficient implementation of the radar signal processing steps. EVE is a RISC controller with a vector coprocessor that is optimized for high throughput, high processing performance at a low power footprint. It can conduct in real time all range and Doppler FFTs as well as perform digital beam forming for multiple beams. In addition, EVE can re-sort the channel-interleaved ADC data and perform the parity check on the fly at a very low additional load.

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