- cases, the transistor is used in designs where extremely tight bias current limitations exist; or,
- In some cases, a given transistor unit in the field is found to be “out of specification” with regard to its published leakage current specification.
A specific example for leakage current specification
For field effect transistors (FET), leakage current is usually specified for both drain-to-source current (IDSS) and for gate-to-source current (IGSS), as in this excerpt from an actual data sheet:
Figure 1: Example of leakage current specifications for FET device. (Click on image for larger version).
Notice that the specifications for leakage current are dependent on certain conditions of the transistor device under test (DUT). In the example above, “Table 5” includes the device’s electrical characteristics, all to be tested at a case operating temperature of TC = 25˚ C (unless otherwise noted). The Zero Gate Voltage Drain Leakage Current, IDSS, is specified twice as a maximum value, with two different drain-to-source voltages (VDS = 66 VDC and VDS = 28 VDC). In each case the gate-to-source voltage is specified at zero volts (VGS = 0 VDC), i.e. the gate and the source of the DUT are shorted together to properly test IDSS. “IDSS Max,” or the maximum allowable value for drain leakage current, is clearly specified for this device as up to 10 times higher with VDS = 66 VDC than it is with VDS = 28 VDC. Gate-Source leakage current, IGSS, is specified once, with VGS = 5 VDC and VDS = 0 VDC, which means the drain and the source of the DUT are shorted to test IGSS.
Key starting point: In order to determine if the leakage current on an actual device is within its own printed specification, care must be taken to reproduce the proper testing conditions.
To determine whether or not a given transistor sample meets its leakage