Researchers integrate silicon, III-V

March 30, 2011 //By R. Colin Johnson
Integrating gallium nitride emitters and other optical materials onto silicon substrates was recently demonstrated at the Toyohashi University of Technology. Researchers there claim to have solved the lattice mismatch problem between silicon and III-V materials, thereby enabling future integration of optics onto silicon chips.

Silicon photonics has been demonstrated for most optical functions, including waveguides, resonators and switches, but optical emitters has remained a task for III-V materials using gallium, arsenide, indium and their various nitrides.

Now, Akihiro Wakahara, the project team leader at Toyohashi Tech (Aichi, Japan) and colleagues claim to have invented a method of mitigating the lattice mismatch between silicon and III-V materials, thereby enabling optical emitters—including lasers—to be fabricated on silicon chips.

As a demonstration, Wakahara's team constructed a one-bit opto-electronic counter circuit that combines silicon field effect transistors (FETs) alongside gallium phosphide nitride (GaPN) LEDs on a single chip. The key to solving the lattice mismatch between silicon and III-V was accomplished by growing a thin gallium phosphide (GaP) layer using migration-enhanced epitaxy with III–V–N alloys. The resulting lattice matched Si/GaPN/Si hetero-structures were grown on silicon substrates using dual-chamber molecular beam epitaxy (MBE).

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