Wireless applications: OS consideration for Zynq All Programmable SoCs

April 15, 2015 // By Yuan Gu, Xilinx
With the explosive increase in wireless data throughput, there is tremendous pressure on improving digital signaling processing technology and radio equipment. Currently, the focus is on 4G LTE.

The 4G networks are being deployed on a large scale all over the world. And we are now seeing the early research and development into 5G networking, which targets to have more than 1000 times the data capacity than 4G networks. This emerging technology development drives new and evolving requirements for system vendors: better system integration, improved system performance, lower system BOM cost, increased design flexibility and faster time to market.

Traditional ASIC-based devices support hardware solutions that may meet power and cost goals, but may suffer very high NREs (non-recurring engineering costs), lack of flexibility, and very slow time to market. In order to meet these requirements and address these challenges, Xilinx introduced the All Programmable SoC (APSoC) architecture and successfully implemented it in the Zynq®-7000 product family.

Based on the Xilinx APSoC architecture, Zynq-7000 devices enable extensive system level differentiation, integration and flexibility through hardware, software and I/O programmability (figure 1). Since its announcement in 2011, Zynq-7000 devices have been adopted in a wide range of markets such as communications, data centers, automotive, industrial and aerospace and defense. For the communication market, especially for wireless applications, Zynq-7000 devices provides key unique advantages: Its integrated programmable logic (PL) is highly optimized for digital signal processing; and its ARM® Cortex™ A9 based processing subsystem (PS) enables the very effective implementation of control functions of typical wireless equipment such as remote radios and wireless backhaul units.

Figure 1: Zynq-7000 All Programmable SoC architecture
. Click image to enlarge.

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