Wireless applications: OS consideration for Zynq All Programmable SoCs: Page 3 of 5

April 15, 2015 // By Yuan Gu, Xilinx
With the explosive increase in wireless data throughput, there is tremendous pressure on improving digital signaling processing technology and radio equipment. Currently, the focus is on 4G LTE.
In general, SMP provides a unified OS platform to higher-level applications. A software architect does not need to consider resource sharing between two cores and inter-process communications when building an application on top of the OS. Furthermore, there is performance overhead for SMP which could impact the performance of time-critical wireless applications. Comparing SMP with AMP, AMP’s light weight software with an OS instance has little to no overhead but it needs careful custom software design of shared processor resources and inter-processor communications.

Several key wireless applications can be implemented very efficiently in one of the Zynq APSoC devices; including radio and wireless backhaul. Each wireless application has different performance requirements and needs the OS to support different features. The radio application is a good case in point where Zynq can be used to implement a fully-integrated, hardware and software solution encompassing all the digital front-end processing.

The radio digital front-end application is the major part of a typical Remote Radio Head (RRH) in the 4G wireless network. The processing requirements here can be split into the signal processing and the control processing. In the signal processing domain, Zynq can be used to implement high sample rate filters for digital up-and-down conversion, Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD). In the case of DPD, it needs to utilize both Zynq PS and Zynq PL.

DPD processing can be broken down into the high-speed data path and the update path. The update path is used to update the filter bank coefficients periodically and is well-suited to being implemented in an ARM Cortex A9 core. Typically the coefficient update must be completed within several to 10’s of milliseconds. Because the arithmetic complexity of the calculations, the A9 core and embed NEON SIMD vector computing unit may be used to meet the required high performance. In addition, the Zynq PL can also support hardware acceleration of processor clock cycle intensive functions and hence the Zynq PL, ARM A9 core, and the NEON co-processor may all be used collaboratively.

The control processing side of radio is typically used for initial radio calibration, configuration, alarms, scheduling, and message termination from the networks. This in a radio application is typically not high performance and as such is easily able to be managed with a single ARM A9 core in Zynq-7000 SoC.

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