Beating the jitter bug – how to apply multiple measurement strategies to identify noise source: Page 4 of 5

November 03, 2016 // By Andrea Dodini, Keysight Technologies
Digitising an analogue signal can improve the chances that the information it represents arrives at its destination uncorrupted by electrical noise. However, digital signals can be corrupted if noise signals alter their timing enough to push the transitions in the bitstream out of sync with the sampling point. This ‘jitter’ means the bitstream is misinterpreted, and can be a particular problem at very high data rates.

In the frequency domain
Looking at the frequency distribution of jitter spectra can reveal deterministic jitter sources, which appear as line spectra. This approach can also reveal phase noise or jitter-versus-frequency offsets from a carrier or clock.

Phase-noise measurements provide insights into phase-locked-loop or crystal-oscillator designs, and can help identify deterministic jitter due to spurious signals. Such measurements can help optimise clock-recovery circuits and reveal internal noise sources.

Figure 5 shows the intrinsic jitter spectrum of a phase-locked loop. The noise peaks at a 2 kHz offset. There are also lines that identify deterministic jitter sources from 60 Hz to approximately 800 Hz, probably generated by the power lines. Frequency lines are also evident from 2 to 7 MHz, probably derived from the reference clock. Another way to obtain a frequency-domain view of jitter is to take a fast Fourier transform (FFT) of the time interval error data (the phase difference between the signal being measured and the reference clock), an approach that can reveal high-level phenomena quickly.

Figure 5: Intrinsic jitter spectrum (Source: Keysight Technologies).

Design category: 

Vous êtes certain ?

Si vous désactivez les cookies, vous ne pouvez plus naviguer sur le site.

Vous allez être rediriger vers Google.