Design and evaluation of a 5-W X-band PA using a low-cost plastic-packaged GaN transistor: Page 3 of 7

June 06, 2016 //By Stuart Glynn, Tony Richards and Liam Devlin, 
Plextek RFI
This article describes the design of a single stage 5-W X-band GaN Power Amplifier using a low-cost SMT packaged transistor. The amplifier is optimized for the 9.3 to 9.5 GHz band: it has 11 dB small signal gain, and provides more than +37 dBm output power at 3 dB gain compression with a corresponding drain efficiency of greater than 55%. The design is based on a commercially available discrete 0.25µm GaN transistor, housed in an over-moulded SMT plastic package mounted on Rogers 4003 PCB. Fast drain switching circuitry is also included on the same PCB to facilitate pulsed operation with a turn-on time of just 20ns.

The amplifier schematic is shown in Figure 2 – all passive components are 0603. The bias networks for both the drain and gate make use of radial stubs which provide a short circuit at mid-band. This was the preferred means of implementing an RF short circuit as it offers better performance, tolerance and bandwidth compared to a shunt SMT capacitor. It also provides a convenient point at which other bias decoupling components can be added without affecting in-band performance. These components are used to provide lower frequency supply decoupling and stabilization, and significantly reduce the low frequency gain.

Figure 2: Amplifier schematic. Click image to enlarge.

The short circuit provided by the radial stub is subsequently transformed to an open circuit by a narrow high-impedance quarter-wavelength line, such that the drain and gate bias networks have almost no effect in-band. This offers some flexibility in positioning the bias networks: convenient points in the distributed matching networks were chosen that were beneficial for both the layout and out of band performance.

A damping circuit was employed at the input to the amplifier, which was a further measure for ensuring low frequency stability and gain reduction. The circuit consists of two parallel short-circuited stubs in front of a parallel arrangement of a capacitor and a lossy inductor, formed by a resistor and two narrow lines. The position and topology of the circuit was carefully chosen to provide maximum low-frequency rejection with minimum impact on in-band performance. An important feature of the topology is that it avoids presenting any undesirable impedance to the device which could lead to oscillation.

The DC blocking capacitor employed at both the input and output was a high quality 0603 multi-layer component. 2-port s-parameter simulations were carried out using a representative model which included the effects of the mounting pads on the chosen substrate. The value selected was the one which gave the lowest in-band insertion loss.

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