This topology works well with silicon LDMOS devices, as their intrinsic operating voltage, power density and parasitic capacitances enable the 90° phase shift and optimum load impedance necessary for the Doherty inverter to work properly.
However, the efficiency of this symmetric approach falls steeply and linearly versus power at 6 dB output back-off.
Various other topologies have been proposed to address this issue, such as asymmetric 2-way or symmetric N-way (N > 2) , and their efficiencies are shown in Figure 2.
An asymmetric two-way architecture is often chosen for base-station power amplifiers, because it only uses two devices and yet achieves excellent back-off efficiency. A 2:1 asymmetric architecture can achieve its optimum efficiency at 9.54 dB back-off, more than 3.5 dB better than with a symmetrical architecture. However, this topology also degrades the amplifier’s bandwidth.
A four-way, 1:1:1:1 topology has the advantage of using equal-sized devices, and reaches optimum efficiency at 12 dB back-off. It also works well within an iDPA approach.