FPGAs solve core IoT challenges: Page 3 of 4

July 06, 2016 //By Helmut Demel, Lattice Semiconductor
The Internet of Things (IoT) has become a wildly popular term these days, often used to describe a world in which virtually every electronic device connects to the Internet and each other. It comprises a staggering list of applications — everything from smart consumer appliances and vehicles to wearables — and that list will only grow as mobility continues to explode. But this growth brings with it implementation challenges to which solutions need to be found.

Challenge 2 – Incompatible Interfaces

Any IoT product will consist of several subsystems with unique functions. Depending upon requirements, there are many choices of components for each of these subsystems. In many cases, however, designers are forced into selecting components solely based on interface compatibility.

For example, changing the processor at the heart of any IoT product design can extremely costly in terms of time and human resource due to the need to retarget code, test, and recertify form, fit, and function. Yet, if you wish to change to a new wireless module because it’s cheaper or has some new feature, but it uses a new serial interface that your processor cannot support, do you change your processor, or is there a solution to bridge these two interfaces for a low cost and without making the product larger? Fortunately, there is a solution: using a very small, low cost FPGAs to bridge the interfaces.

There are numerous reference designs for the bridging of different interfaces. These FPGA-based solutions solve problems like interfacing with an image sensor when the processor does not support SubLVDS, CSI-2, or HiSPI. Or the implementation of a low-cost display with a processor that only has a SPI output for video. FPGAs can solve that problem and still preserve cost savings and form factors. See some examples in Figures 2 through 5 below.


Figure 2: Embedded image sensor and application processor bridge.


Figure 3: Connecting a low resolution camera to SPI port of processor.


Figure 4: Converting display interfaces.


Figure 5: Refreshing screens with processor idle to lower power.

Design category: