You also need to measure a receiver's sensitivity to input signal linearity and level separation mismatch. To make those measurements, you should adjust all three PAM4 eye diagram heights together or separately as desired using the amplifiers' output amplitude adjustments.
Additional receiver tests
An essential test for a receiver's clock recovery circuit consists of evaluating its tolerance to various degrees of SJ over a certain frequency range. The degree of SJ at each frequency is specified in the jitter tolerance mask given by the standards. In general, PAM4 receivers must tolerate both several UIs of SJ (between 5 UI and 0.05 UI) at SJ frequencies below the clock recovery bandwidth and limited UI SJ (0.05 UI) for SJ frequencies above the clock recovery bandwidth.
A receiver’s equalization capability (CTLE and/or DFE) can be tested by subjecting it to the maximum ISI of any realistic transmitter and channel pairing. As stated earlier, ISI type effects can be generated using the pre(de)-emphasis capabilities of the active amplifiers.
PAM4's present day and future standards do and will require separate compliance tests for cases of high interference/crosstalk with low ISI/insertion loss and low interference/crosstalk with high ISI and insertion loss. This makes sense because a receiver's tolerance to interference and crosstalk can vary in different situations and thus separate tests are necessary. Again, the active amplifiers can use their individual amplitude control, pre(de)-emphasis, and jitter insertion capabilities to help create the required testing conditions. Further alterations of these elements can be used to gauge the receiver’s performance beyond the mandatory test conditions.