An X-band GaN PA MMIC for phased array radar applications: Page 2 of 6

June 29, 2017 // By Stuart Glynn and Liam Devlin, Plextek RFI
Active phased array radars require numerous power amplifiers (PAs), which must be small, efficient and low-cost. This article describes an X-band PA MMIC that covers 9 to 11.5 GHz and satisfies these requirements. It has an output power of 7W (38.5 dBm) from a 29 dBm drive with a Power Added Efficiency (PAE) of 42%.

Design and layout

The PA was designed for realisation on the 0.25µm gate length GaN-on-SiC process of UMS (GH25). The design process commenced with simulations at the transistor level to determine the preferred transistor size and bias. The RF output power that a transistor can generate increases as the total gate periphery increases. However, as the physical size of the transistor starts to become electrically significant, both the large-signal and small-signal performance will start to degrade as a result of distributed parasitics. For this reason, microwave frequency PAs normally make use of multiple power combined transistors, and the impact of the transistor’s size on performance must be carefully considered.

Another factor to consider in selecting the optimum transistor size is the range of validity of the transistor models. Commercial foundries normally have Process Design Kits (PDKs) that include scalable transistor models. While the models may allow arbitrary adjustment of gate width and number of fingers, they will be based on data from a selection of transistors of discrete sizes. It is best to try to select a transistor size that does not require too much extrapolation from the sizes of transistors used to generate the models.

With these factors in mind an 8 x 150µm transistor was selected for the planned design. The recommended Vds for GH25 transistors is 25V; simulations were undertaken comparing Psat, PAE, and available gain at various quiescent bias currents. Figure 1 shows an example set of load-pull contours. The Psat (at 4 dB compression) for the selected transistor size was around 36.5 dBm (4.4W), and varied only modestly with the quiescent bias. The PAE improved with reducing quiescent bias current, but the small signal gain decreased. The design was progressed with a quiescent bias current (Ids) of 45mA (37.5mA/mm); the performance with a higher bias current of 90mA (75mA/mm) was also reviewed during the design process to assess the performance benefits that a higher bias current could potentially offer.

Figure 1: Load-pull simulations on the 8x150µm transistor using ADS 2015.

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