Thalia is developing EDA tools that use behaviour algorithms from nature for the rapid optimisation of analogue and mixed-signal performance and power consumption. The money raised will be used to expand at Thalia's headquarters in Cwmbran, Wales, and in Bangalore, India and to support initial customer engagements for the company's tools.
The company was founded in 2011 by Sowmyan Rajagopalan, who serves as CEO and CTO. Rajagopalan had previously worked as CAD engineering manager for Micrel, as noted in his social-media profile. Rodger Sykes, a UK semiconductor industry veteran, serves the company as chairman.
The company has developed the Amalia analogue circuit design optimiser and the Emera power device design optimiser. "Thalia has taken a number of algorithms from nature – such as methods used by ants and bees to search for food – and applied them to optimising design results. The power tool works alongside layout tools and so works at the physical level to minimise size and power. The analogue tool works at the variable component and functional level and can home-in on an optimum solution much faster than traditional approaches," said Sykes.
"Analogue design methodology has remained unchanged for a long time. I have seen the technical and time-consuming efforts analogue designers have had to live with in order to design and optimise their circuits," said Rajagopalan, in a statement. "Thalia's tools will enable users to meet more challenging design requirements within shorter time frames. Custom chip design companies will benefit from reduced design times, shortened redesign cycles, better performing parts and more effective use of scarce skilled design resource," he added.
The AI methods used by Thalia involve considering millions of combinations of multiple component parameters to select the combination with gives the best circuit performance. Optimisations that typically took several days to weeks to complete can now be performed in a matter of hours, the company added in its statement. The tools can be used to support the retargeting of existing designs to alternative silicon foundries for cost reduction and sourcing flexibility.