NI AWR Design Environment Version 13 boosts design productivity

January 27, 2017 //By Jean-Pierre Joosting
Version 13, the first major update in 2017 to the NI AWR Design Environment, has been released.

V13 provides key new capabilities and major enhancements to better address the design challenges associated with highly-integrated RF/microwave components commonly found in communications, phased-array radar and other electronic systems.

V13 also introduces numerous innovations in design flow management and simulation, supporting monolithic microwave integrated circuit (MMIC), RFIC, multi-chip module and printed circuit board (PCB) technologies. Simulation capabilities have been expanded within the Microwave Office APLAC harmonic balance (HB) and Visual System Simulator™ (VSS) system-level simulation engines and speed improvements have been made to both its AXIEM planar 3D and Analyst™ arbitrary 3D electromagnetic (EM) solvers.

Design automation and simulation have been enhanced for multi-chip modules, with greater support for multi-technology process design kits (PDKs) within a single project, new support for OpenAccess (schematic) databases and APLAC co-simulation support for Spectre RFIC netlists, as well as simplified EM layout and port creation. For PCB design, a new import wizard supports ODB++ and IPC2851 databases to provide interoperability with mainstream third-party PCB layout tools. New layout editing capabilities have also been added, along with simplified multi-technology management. Furthermore, the new EM Socket II architecture within V13 offers improved third-party EM simulation flows for AWR Connected™ partner solutions from ANSYS, CST and Sonnet, giving designers access to alternate EM simulators within NI AWR Design Environment.