Protocol analyser unravels mobile computing buses

January 30, 2014 // By Christoph Hammerschmidt
Increasing mobility and complexity of mobile designs poses challenges to test and validation. A protocol analyser from Agilent enables engineers in R&D and manufacturing to track protocol data exchange and identify possible errors.

The company has expanded its U4431A MIPI M-PHY protocol analyser for next-generation mobile computing applications by SSIC and CSI-3 support. Thus, the protocol analyser provides insight into MIPI M-PHY-based designs.

CSI-3 (Camera Serial Interface) leverages the CSI-2 protocol of the D-PHY physical layer to the higher-performance M-PHY. SSIC (SuperSpeed USB Inter-Chip) allows USB-enabled functionality to work in M-PHY-based mobile systems.

Mobile designers are adding multiple high-speed buses to their designs to manage multiple high-resolution cameras, advanced graphics adapters and on-board memory. These high-speed buses contribute to increasing demand for bandwidth, which has driven the expansion of the M-PHY specification to include four-lane, 6.0-Gbs options. The U4431A offers up to 16 GB of analysis memory on each lane, allowing designers to capture tens of seconds of system traffic, even at these high speeds.