Signal quality analyzer offers high-speed interface measurement functions

December 18, 2017 // By Jean-Pierre Joosting
Anritsu Corporation has released the Variable ISI MU195020A-040/041 option for upgrading the Emphasis function of the Pulse Pattern Generator for the MP1900A series Signal Quality Analyzer, along with the USB Link Training Software MX183000A-PL022 supporting the USB3.0/3.1 Receiver Test.

The MP1900A is a high-performance Bit Error Rate Tester (BERT) supporting design and testing of high-speed interfaces, such as 100G/200G/400G Ethernet, PCI Express, USB, and Thunderbolt. Using the newly developed Variable ISI option offers easier and more efficient evaluations of high-speed interfaces, backplanes, and cables. In addition, USB Link training supports high-reproducibility measurements of the PHY-layer of USB3.0/3.1 devices by controlling the MP1900A.

With a built-in PPG supporting a 10Tap Emphasis function for testing the effect of transmission path loss plus Jitter and Noise Addition functions, a high-sensitivity BER measurement function, and Link Training function, the MP1900A series is ideal for measuring high-speed interfaces.

Increasing mobile data traffic and the spread of cloud services is accelerating the introduction of 100G/200G/400G Ethernet for network interfaces along with PCI Express Gen4 and USB3.1 for bus interfaces. However, the effects of transmission path loss and noise resulting from the faster signals used by these standards and the integration of ICs and modules highlights the importance of stress Rx testing using signal sources with added transmission path loss and noise.

The Variable ISI option uses the 10Tap Emphasis function with high and flexible signal controllability to emulate CEI-25G/28G-defined signal path transmission losses which cannot be achieved by utilizing an emphasis function with lower number of taps. In addition, Anritsu’s MP1900A can automatically calculate the Emphasis settings for compensating these losses based on transmission path S-parameter data. With these new capabilities, test signals emulating the transmission path impairments can be generated easily, allowing the impact of transmission path losses on the evaluated device to be evaluated simply without testing various PC boards, helping to cut development costs and time.