Xilinx to offer programmable RF for 5G

March 02, 2017 // By Peter Clarke
Xilinx Inc., is getting ready to offer a family of application-specific chips for implementing baseband transceivers for 5G communications.

Typical applications are massive MIMO for 5G and millimeter wave wireless backhaul, although the general approach of adding high frequency analog in leading-edge digital processes could have wider implications for Xilinx's evolution. The first products in the RFSOC range are expected to start shipping in 2H17.

As a vendor of FPGAs Xilinx has long-held a prominent position selling its chips for basestations and remote radio heads and the inclusion of RF analog on its silicon is an extension of that position, said Kirk Saban, product manager for FPGAs and SoCs at Xilinx.

The RFSOC family of products will be based on the Zynq UltraScale+ family of MPSOCs, which are implemented in 16nm FinFET digital CMOS process. These devices include up to four Cortex-A53 cores, the option of dual-core Cortex-R5 real-time processors, as well as different-sized areas of programmable logic. The family comes with numerous high-speed interfaces to memory.

Xilinx is adding multi-gigasample RF ADCs and DACs and a signal train for digital signal conditioning in both the up and down directions at radio frequency. This eliminates the need for external ADCs and DACs and enable the chip to connect directly to RF power amplifiers and low-noise amplifiers on the send and receive sides. It also allows scalability for multi-element phased-array antennas.

The 16nm-based RF data conversion is much more aggressive than is available in stand-alone components and includes: direct RF sampling for simplified analog design, greater accuracy, smaller form factor, and lower power. These include sets of 12-bit ADCs at up to 4 GSPS, high channel count, with digital down-conversion and 14-bit DACs at up to 6.4 GSPS, high channel count, with digital up conversion.

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