Xilinx takes RFSoCs to the next level for 5G, cable and radar: Page 5 of 8

October 05, 2017 //By Jean-Pierre Joosting
With silicon shipped to multiple customers already and an early access programin place, Xilinx has announced its Zynq® UltraScale+™ RFSoC family that features a breakthrough architecture integrating the RF signal chain into an SoC for 5G wireless, cable Remote-PHY, and radar.

To summarize, devices in the family feature:

  • Eight 4GSPS or sixteen 2GSPS 12-bit ADCs;
  • Eight to sixteen 6.4GSPS 14-bit DACs;
  • Integrated SD-FEC cores with LDPC and Turbo codecs for 5G and DOCSIS 3.1;
  • ARM processing subsystem with Quad-Core Cortex™-A53 and Dual-Core Cortex™-R5s;
  • 16nm UltraScale+ programmable logic with integrated Nx100G cores;
  • Up to 930,000 logic cells and over 4,200 DSP slices.

Applications addressed by the Zynq RFSoC family include remote radio head for massive-MIMO, millimeter wave mobile backhaul, 5G baseband, fixed wireless access, remote-PHY nodes for cable, radar, test and measurement, SATCOM, military communications, airborne radio and other high performance RF applications.

Zynq UltraScale+ RFSoC devices now make viable the most bandwidth intensive systems for next generation wireless infrastructure. 5G imperatives—ranging from 5X bandwidth, 100X user data rates, and 1000X greater network capacity—would be unattainable without breakthroughs at the system level. The integration of discrete RF data converters and signal chain optimization in Zynq UltraScale+ RFSoCs allow remote radio head for massive-MIMO, wireless backhaul, and fixed wireless access to realize high channel density with 50-75 percent power and footprint reduction. Multiple integrated SD-FEC cores enable 10-20X system throughput versus a soft core implementation for 5G baseband within stringent power and thermal constraints.


Implementing RF front-end and digital front-end radio with Zynq UltraScale+ RFSoCs.