This combination of 18 outputs – two more than its nearest competitors – and best-in-class additive jitter performance make the 8SLVS1118 ideal for current and emerging telecommunication, industrial and medical applications that have critical timing requirements necessitating well-defined and repeatable clock distribution performance.
The 8SLVS1118's 18 outputs are a compelling advantage for designers of routers and switches used in networking, industrial and medical applications, which have seen their BOM costs increase as the number of ports steadily rise to 96 on a typical board. Designers can reduce their overall bill of materials (BOM) by utilizing the 18 high-density outputs of 8SLVS1118 and their selectable CMOS, LVPECL, or LVDS logic levels to simplify the clocking architecture of their products, rather than having to use additional fanout buffers with fewer outputs.
Complementing the advantages of 8SLVS1118's 18 outputs is its best-in-class additive jitter performance of just 39 fs, which is substantially lower than the 50+ fs performance typical of competitors' large fanout buffers. High-performance switches and routers require extremely clean signals, which makes additive jitter a major concern as it grows as switches and routers increase in performance from 25 to 100 to 400 Gbps and beyond.