The first two ICs to debut in the nRF51 Series are the nRF51822, a multi-protocol Bluetooth low energy, 2.4 GHz proprietary RF SoC, and the nRF51422, the first ANT/ANT+ protocol based SoC. The devices share a high performance, lower power 2.4 GHz multi-protocol radio and a 32-bit ARM Cortex-M0 based processor. These enhancements deliver up to 50% lower power consumption, RF link budget improvements of up to 9.5 dB, and over 10x more processing power compared to the company’s previous generation of ULP wireless ICs.
A clean partitioned software architecture for the Bluetooth® low energy and ANT™ SoCs frees designers from the integration effort, complexities, and restrictions of chip vendor-supplied software frameworks and instead allows customers to develop their designs quickly and easily using the highly popular and familiar ARM Cortex programming environment. This major benefit is achieved by separating the protocol stack and user application code — providing developers a clean boundary between application and protocol stack, and removes the need to struggle with integration of application code as part of a vendor-imposed application development framework. Code development is now greatly simplified and accelerated and at the same time risks associated with integration of application and stack code are significantly reduced. Customers can expect lower bug rates and improved robustness for their applications.
Moving to the Cortex-M0
Nordic, which traditionally uses 8051-compatible controllers, has implemented the Cortex-M0 core in the nRF51 Series. The use of the ARM Cortex-M0 delivers up to 10x more processing performance and 100x faster start-up of 2.5 µs from sleep, versus the legacy 8-bit 8051.
Further advantages of the Cortex-M0 core include improved code density, industry-standard tool chain, large software ecosystem, 4.4 mA peak executing from Flash, and a smooth code migration path.
The processor finishes tasks faster, spending more time sleeping, quickly wakes up using less current starting up, and enables the peripherals to operate autonomously. Here the CPU programs a sequence of peripheral