Based on 16nm UltraScale+ MPSoC architecture, the All Programmable RFSoCs monolithically integrate RF data converters for up to 50-75 percent system power and footprint reduction, and soft-decision Forward Error Correction (SD-FEC) cores to meet 5G and DOCSIS 3.1 standards.
Zynq RFSoCs combine RF data converters and SD-FEC cores with high performance 16nm UltraScale+ programmable logic and ARM® multi-processing system to create a comprehensive analog-to-digital signal chain. While RF to digital signal conditioning and processing is typically segmented into stand-alone subsystems, these RFSoCs bring analog, digital, and embedded software design onto a single monolithic device for system robustness.
The All-Programmable RFSoC integrates up to 16x16 carrier-grade RF sampling ADCs and DACs tightly coupled to programmable logic and an ARM multi-processing subsystem. By eliminating discrete ADC and DAC components, systems can achieve up to 50-75 percent reduction in system power and footprint.