5G infrastructure needs programmability: Page 5 of 5

February 14, 2019 //By Alok Sanghavi, Achronix Semiconductor Corporation
5G infrastructure needs programmability
Alok Sanghavi surveys the 5G infrastructure landscape and makes the case for FPGAs and chiplet packaging to support evolving standards and high performance computation.

As described previously, the primary objective here is to afford improved time-to-market, flexibility and future proofing. Time-to-market comes from the fact that the SoC can be taped-out earlier, as late changing modifications (e.g. the emergence of Polar Codes in 5G) can be targeted into eFPGA rather than ASIC. Flexibility results from new or unexpected algorithms (e.g. new encryption standards) can be addressed in embedded programmable logic rather than software or external FPGA. Finally, future proofing enables the SoC lifecycle to be extended, as the large emerging requirements, for example for new standards such as URLLC and mMTC, can be addressed by the existing product rather than requiring a new development.

In brief conclusion from the 5G perspective, a highly programmable solution enables a faster time to market. It is no longer necessary to delay a system-on-chip tape-out until standards are finalized; late changing requirements can be absorbed in software or programmable hardware. This is a powerful advantage with the relentless (and increasing) pressure for early 5G deployments, coupled with the relentless emergence of new standards.

Alok Sanghavi is a senior manager of product marketing at Achronix Semiconductor Corporation. Prior to joining Achronix, Sanghavi was at Toshiba, where he led the product definition of several semiconductor chipsets into the market. He holds an MBA from the University of California at Davis and Master of Science degree in Electrical Engineering from New York University.


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