In high-speed and high-resolution digitizer products this causes a bottleneck effect where the ADC can digitize much more data than can be easily transferred to the PC environment. For example, USB based digitizers commonly boast acquisition sampling rates higher than 100 Mega-samples per second (MS/s) but data transfer speeds to the PC are often limited by the bus to only a few MBytes/s. This bottleneck effect leads to situations where the digitizer has to stop acquiring data, potentially missing important events, while it waits to clear previously stored information. Furthermore, the slow transfer rates limit a systems overall measurement and analysis speed. This becomes a major concern in applications where large amounts of data have to be collected, stored and analyzed.
Approaches to the bottleneck problem
One approach to solving the bottleneck problem is to send the data to on-board Field Programmable Gate Arrays (FPGA’s) where the end user can process the data and endeavor to reduce the amount of information that needs to be sent over the bus to the PC. However, at high speeds, this approach is usually quite expensive as it requires costly FPGA firmware development tools and specialized engineering knowledge. Developing advanced FPGA firmware is not a simple task and, depending on the algorithms being implemented, can take an extensive amount of time before the firmware is designed, debugged and operational. This sort of investment only makes sense for very large projects.