FPGAs use transcoding to reduce bandwidth cost in video streaming

June 25, 2020 //By William G. Wong, Electronic Design
FPGAs use transcoding to reduce bandwidth cost in video streaming
Bandwidth equals cost when it comes to video streaming and transcoding helps solve that problem by reducing bandwidth requirements.

COVID-19 has turned a lot of people onto video streaming. However, it just accelerated an already growing trend. Streaming video is being used for all sorts of things, including live game streaming. Increased bandwidth and low latency are making video streaming very desirable, but bandwidth equals cost. To save money, bandwidth requirements can be reduced through transcoding. Xilinx has an answer.

Transcoding essentially converts data of some input format to an output format. Typically, this is done to compress video so that, say, a 4-Mb/s input stream scales down to 2.8 Mb/s. If the monthly cost of a gigabyte-per-second is $0.05, then 100K stream compressions will result in a cost savings of $21 million.

The Xilinx Real-Time (RT) Server reference design targets the video-streaming space (Figure 1). The High Channel Density Video Appliance version contains up to eight Alveo U30 FPGA accelerator cards, while the Ultra-Low Bitrate Optimized Video Appliance integrates up to eight Alveo U50 cards.

1. The Xilinx Real-Time (RT) Server High Channel Density Video Appliance reference design contains up to eight Alveo U30 FPGA accelerator cards, while the Ultra-Low Bitrate Optimized Video Appliance has up to eight Alveo U50 cards.
Figure 1: The Xilinx Real-Time (RT) Server High Channel Density Video Appliance reference design
contains up to eight Alveo U30 FPGA accelerator cards, while the Ultra-Low Bitrate
Optimized Video Appliance has up to eight Alveo U50 cards.


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